Introduction

The metal insulator semiconductor field effect transistor (MOSFET), as shown in figure 1, is extremely important to modern electronic applications. [1] Operation involves imposing a voltage across the gate region, $v_{gate}$, that is sufficient to bend the electron bands of the semiconductor in the region near the semiconductor-insulator interface. If $v_{gate}$ is larger than the threshold voltage, $v_{th}$, then the bands bend to the point that the carrier concentration is inverted (the p-type semiconductor becomes n-type) and electrons can flow from the source to the drain.¹ Operation of the gate requires that a critical capacitance exists in the gate oxide so that sufficient charge can build up. The capacitance of plate capacitors is expressed as, $C=\frac{A K \epsilon_{o}}{t}$, where A is plate area, $\epsilon_{o}$ is the permittivity of free space, K is the dielectric constant of the insulating material, and t is the thickness of the insulating material.

Figure 1: Geometry of MOSFET transistor taken from reference [2].

The drive to miniaturize devices requires a reduction of the area of the gate. To maintain the capacitance while reducing the area requires that the thickness of the oxide be reduced. It has been discovered that once this oxide layer, currently SiO$_{2}$, becomes thinner than 0.8nm, the tunnel current through the gate oxide will be sufficient to disrupt operation of MOSFET devices by causing random fluctuations in the $v_{th}$ value. [3]

It has been proposed to replace the SiO$_{2}$ oxide with a higher dielectric material such as Al$_{2}$O$_{3}$, TiO$_{2}$, ZrO$_{2}$, HfO$_{2}$, Al$_{2}$O$_{3}$, Y$_{2}$O$_{3}$, La$_{2}$O$_{3}$. [4,5] This would allow the area to be reduced and the capacitance to be maintained without significantly thinning the oxide, thereby avoiding the problem of tunneling. The proposed replacement oxides must have sufficient dielectric coefficient, a low density of defect states at the semiconductor-insulator interface, and be thermally stable. The condition of thermal stability being defined as a low diffusivity of oxide constituents outward and low diffusivity of metal and semiconductor constituents inward, at reasonable temperatures.

A recent article by Quevedo-Lopez [5] investigated the diffusion of hafnium and zirconium in silicon. The results of the study indicated that Hf does not diffuse well into Si whereas Zr does diffuse under ``aggressive'' thermal annealing. Some have suggested that the problem of diffusion of Zr in Si can be solved by either the application of a diffusion barrier [6] or by the creation of a Si/SiO$_{2}$/ZrO$_{2}$ layered structure. [7]

Although it would be desirable to study the diffusion of these point defect by ab initio methods, it is a sufficient first step to investigate the concentration of defect atoms in bulk Si. Insight to the mechanism of and barriers to diffusion can be gained by understanding the point defects that exist under various conditions. In this paper the technique used to study, via ab initio methods, the equilibrium concentrations of point defects in elemental and compound semiconductors will be presented. As a proof of principle a sample calculation will be performed to investigate the concentration of zirconium in silicon.

The Formalism section of this paper will highlight the technical background necessary to perform the calculations. The Methods section will discuss the methods used to study Zr in Si. In the Results section, the results from the calculations will be presented.